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? idt and the idt logo are registered trademar ks of integrated device technology, inc. ? 2011 integrated device technology, inc 1 february 8, 2011 device overview the idt 89HP0604SB (p0604sb) is a 6gbps sas/sata? repeater device featuring idt eyeboost? techno logy that compensates for cable and board trace attenuations and isi ji tter, thereby extending connection reach. the device is optimized fo r sas/sata high speed serial data streams and contains four data c hannels, each able to process 6gbps transmission rates. each channel consists of an input equalizer and amplifier, signal detection with glitch filter, as well as programmable output swing and de-emphasis. allo wing for application specific optimization, the p0604sb, with its configurable receiver and transmitter features, is ideal for sas/sata applic ations using a wide combination of cables and board trace materials. all modes of active data transfer are designed with minimized power consumption. in full shutdown mode, the part consumes less than 40mw in worst case environmental conditions. applications ? blade servers, rack servers ? sas/sata instrumentation ? storage systems ? cabled sas/sata devices features ? compensates for cable and pc b trace attenuation and isi jitter ? programmable receiver equalization up to 24db ? programmable transmitte r swing and de-emphasis ? recovers data stream even when the differential signal eye is completely closed due to trace attenuation and isi jitter ? full sas/sata protocol support ? configurable via external pins ? leading edge power minimization in active and shutdown modes ? no external bias resistors or reference clocks required ? channel mux mode, demux mode, 1 to 2 channels multicast, and z-switch function mode ? available in a 36-pin qfn package (4.0 x 7.5mm with 0.5mm pitch) benefits ? extends maximum cable length to over 8 meters and trace length over 48 inches in sas/sata applications ? minimizes ber 89HP0604SB data sheet 4 channel 6gbps sas/sata signal repeater typical application figure 1 idt repeaters in blade servers
idt 89HP0604SB data sheet 2 february 8, 2011 sas/sata compliance the device was designed to provide end users with features needed to comply with sas/sata system application requirements: ? sas/sata out-of-band (oob) support ? jitter, eye opening, and all other ac and dc specifications. block diagram the p0604sb contains four hi gh speed channels as shown in figure 2 . each channel can be routed to different outputs. depending on user configuration via mode selections, input traffic can be muxed or demuxed. powerdown (pdb) is provided for state and channel con trol. figure 2 block diagram
3 february 8, 2011 device overview ................................................................................................................ ................ 1 applications................................................................................................................... ..................... 1 features....................................................................................................................... ...................... 1 benefits ....................................................................................................................... ....................... 1 typical application ............................................................................................................ ................. 1 sas/sata compliance ............................................................................................................ ......... 2 block diagram.................................................................................................................. .................. 2 functional description ......................................................................................................... .............. 5 power-up....................................................................................................................... ............ 6 power sequencing............................................................................................................... ...... 6 idt eyeboost? technology ..................................................................................................... 6 eye diagram parameters ......................................................................................................... .7 modes of operation ............................................................................................................. ...... 7 electrical specifications ...................................................................................................... ............. 11 absolute maximum ratings ..................................................................................................... 11 recommended operating conditions...................................................................................... 11 power consumption .............................................................................................................. .. 12 package thermal considerations............................................................................................ 12 dc specifications .............................................................................................................. ...... 13 ac specifications.............................................................................................................. ....... 13 pin description................................................................................................................ ................. 17 package pinout ? 36-qfn signal pinout ....................................................................................... 19 pin diagram .................................................................................................................... ................. 19 qfn package dimension .......................................................................................................... ...... 20 revision history ............................................................................................................... ................ 21 ordering information........................................................................................................... ............. 22 table of contents
idt 89HP0604SB data sheet 4 february 8, 2011 page intentionally left blank
idt 89HP0604SB data sheet 5 february 8, 2011 functional description the p0604sb has 4 channels, each with the indi vidually programmable features listed below. figure 3 diagrams the channel and table 1 summarizes key configuration options. figure 3 channel block diagram with channel features ? per-channel programmable featur es used at the receive side. ? input equalization with 3 levels: 2 to 14db compensation fo r high frequency signal attenuation due to cables and board traces. additionally, up to 10db boost is added automatically by the equalizer for applic ations using long cables. the total equalization range is be tween 2db and 24db. ? input high impedance control via channel enable: di sabled (active mode) and hi-z (power-down). ? per-channel programmable featur es used at the transmit side. ? output de-emphasis with 8 levels: 0 to -6 .5db. the de-emphasis boosts the magnitude of higher frequencies sent by the transmitt er to compensate for high frequency losses travelli ng through output side cable or output side board traces. this ensures that the fi nal received signal has a wider eye opening. ? output differential swing with 3 le vels: 0.5v to 0.95v (peak-to-peak). ? loss of signal detection: when the incoming differential peak-peak amplitude falls below 110mv, the device enters loss of signa l mode and the corresponding transmitter stops toggling, maintains its common mode voltage level, and meets all loss of signal specificati ons described in the ac specifications section of this data sheet. in addition, the device contains gl obal configuration of the data path: ? transfer modes: direct connec t, cross-connect, multicast. input termination [ 100 ohm [ oob/los detection with glitch filter programmable equalizer 0 to 14db up to 10db auto-boost programmable transmitter [ de-emphasis: 0 to -6.5db [ voltage swing: 500mv to 950mv channel power-down + _ output termination [ 100 ohm [ + _
idt 89HP0604SB data sheet 6 february 8, 2011 power-up after the power supplies reach their minimu m required levels, the p0604sb powers up by setting all input and output pins to kno wn states: ? all the device's input configuration pins ar e set internally to vss or vdd for 2-le vel pins and to vdd/2 for 3-level pins. ? high speed differential input and output pins depend on various conditions described below: ? high speed differential input and output pins are in hi gh impedance if any of the following conditions is true: ? powerdown is set (pdb pin = 0v) or ? no receiver termination was detected at tx outputs in all other cases, high speed differential input and output pins are set to 50 ohms per pin, with 100 ohms differential impeda nce. also refer to table 2 , power reducing modes . the power ramp up time for the p0604sb should be less than 1ms. power sequencing there are no power sequencing c onstraints for the p0604sb. idt eyeboost? technology idt eyeboost? technology is a method of data stream recovery even when the di fferential signal eye is complete ly closed due to cable or trace attenuation and isi jitter. with idt eyeboost?, the system desi gner can both recover the incoming data and retransmit it to tar get device with a maximized eye width and amplitude. an exampl e of idt eyeboost? usage in a system appl ication and eye diagram results are shown in figure 4 . in this figure, the (a) diagram shows incoming differential signal (closed eye) after 62 inch fr4 connection from signal source an d the (b) diagram shows differential signal at the output of repeat er maximized eye opening with idt eyeboost?. figure 4 eye diagram (a) (b)
idt 89HP0604SB data sheet 7 february 8, 2011 eye diagram parameters modes of operation the device supports several data transfer modes, lo ss of signal mode, and one power reducing mode. loss of signal mode when the input signal is lost, the transmitter stops toggling and maintains its common-mode voltage level. the device detects l oss-of-signal (los) when the envelope of the incoming signal on a given channel has fallen below a progr ammable threshold level. power reducing modes the repeater supports five power-down st ates and one active state as shown in table 2 . the user can choose between full chip power-down or channel based power-down. power reduci ng modes are selected via pdb and chann el enable pins (a0en, a1en, etc.). feature feature type parameter names for programming via pins input equalization main eye optimization a0rxeq, a1rxeq, b0rxeq, b1rxeq range: 0db to 14db (plus additional auto- boost up to 10db for long connections) output differential signal swing (peak-to-peak) and output de-emphasis main eye optimization a0txsw, a1txsw, b0txsw, b1txsw range: 0.5v to 0.95v for swing range: 0 to -6.5db for de-emphasis table 1 quick reference: parame ters used for eye optimization power reducing mode required signal values state description pdb full ic power- down 0 all channels are powered-down rx termination is set to hi-z tx termination is set to 1k tx common-mode is at vdd channel enabled and active. no power-down 1 tx output is active receiver terminations set to 50 transmitter terminations set to 50 table 2 power reducing modes
idt 89HP0604SB data sheet 8 february 8, 2011 channel muxing the p0604sb repeater permits a variety of mu xing, demuxing, and switching configurations, and it can mux/de-mux 1 or 2 bi-direc tional sas/ sata lanes (4 sas/sata channels) into 2 target devices. these configurations require the selection of specific pins for input a nd output ports. in the following sections, each configuration is described in terms of pin connectivity to external ups tream and downstream devices. t he configurations shown are those often used in system designs: ? uni-directional 2:1 mux (1 or 2 instances) ? uni-directional 1:2 de-mux (1 or 2 instances) ? bi-directional 2:1 mux/de-mux ? bi-directional z-function (also called partial cross function) the p0604sb supports channel muxing in both upstream and downstream channel directions via the chsel pin, as shown below. figure 5 shows the channel/reference muxing modes and table 3 shows how chsel (channel transfer selection) pi n allows for various modes of data transfers: multicast mode, direct-connect, and cross- connect. both direct-connect, and cross-connec t modes are used to build uni-direction al and bi-directional 2:1 mux and z-switch functions. figure 5 diagram of channel/reference muxing modes input pins output pins chsel a0rx[p,m] a1rx[p,m] b0rx[p,m] b1rx[p,m] a0tx[p,m] a1tx[p,m] b0tx[p,m] b1tx[p,m] chsel=vss (multicast mode) a0 data x b0 data x a0 data a0 data b0 data b0 data chsel=open (direct-connect mode) a0 data a1 data b0 data b1 data a0 data a1 data b0 data b1 data chsel=vdd (cross-connect mode) a0 data x b0 data x squelched a0 data squelched b0 data table 3 description of cha nnel muxing/de-muxing functionality
idt 89HP0604SB data sheet 9 february 8, 2011 uni-directional 2:1 mux or two instances of unidirectional 2:1 mux this function can be achieved by using the chsel pin as a mux control signal. chsel s hould be set to either vdd or open. the po rts should be configured as shown in figure 6 . figure 6 implementation of unidirectional 2:1 mux as an alternative, different chip channels can also be selected as shown in figure 7 . this solution can be combined with the previous one to obtain two instances of uni-directional 2:1 mux. figure 7 implementation of second in stance of unidirectional 2:1 mux uni-directional 1:2 de-mux or two instances of unidirectional 1:2 de-mux this function can be achieved by using chsel pin as a de-mux c ontrol signal. chsel should be set to either vdd or open. the por ts should be configured as shown in figure 8 . figure 8 implementation of unidirectional 1:2 de-mux a0rx(p,n) a1rx(p,n) a1tx(p,n) device #1 device #2 device #3 chsel chsel = vdd: out = a chsel = open: out = b out a b b0rx(p,n) b1rx(p,n) b1tx(p,n) device #1 or #4 device #2 or #5 device #3 or #6 chsel chsel = vdd: out = a chsel = open: out = b out a b a0tx(p,n) a1tx(p,n) a0rx(p,n) device #2 device #3 device #1 chsel chsel = open: a = in chsel = vdd: b = in in a b
idt 89HP0604SB data sheet 10 february 8, 2011 as an alternative, different chip channels can also be selected as shown in figure 9 . this solution can be combined with the previous one to obtain two instances of uni-directional 1:2 de-mux. figure 9 implementation of second in stance of unidirectional 1:2 de-mux bi-directional 2:1 mux/de-mux the bi-directional mux and de-mux function c an also be achieved by using the chsel pi n as a mux control signal. chsel should be set to either vdd or open. the ports shoul d be configured as shown in figure 10 . figure 10 implementation of bi--directional 2:1 mux/de-mux bi-directional z-function (also called partial cross function) this function can also be achieved by using the chsel pin as a flow control signal. ch sel should be set to either vdd or open. the ports should be configured as shown in figure 11 . figure 11 implementation of z-function b0tx(p,n) b1tx(p,n) b0rx(p,n) device #2 or #5 device #3 or #6 device #1 or #4 in a b chsel chsel = open: a = in chsel = vdd: b = in device #1 device #2 device #3 chsel chsel = vdd: i/o = a chsel = open: i/o = b i/o a b a0rx(p,n) b1tx(p,n) a1rx(p,n) b0tx(p,n) a1tx(p,n) b0rx(p,n) device #1 device #2 device #3 device #4 a0tx(p,n) b1rx(p,n) a1tx(p,n) b0rx(p,n) a0rx(p,n) b1tx(p,n) a1rx(p,n) b0tx(p,n) chsel=open chsel=open c h s e l = v d d
idt 89HP0604SB data sheet 11 february 8, 2011 electrical specifications absolute maximum ratings note: all voltage values, except differential voltages , are measured with respect to ground pins. warning: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the devic e. these are stress ratings only and functional operation of the device at these or any conditions beyond thos e indicated under recommended operating condi tions is not implied. exposure to absolute-maxi mum-rated conditions for extended peri ods may affect device reliability. recommended operating conditions parameter value unit supply voltage range vdd ?0.5 to 1.35 v voltage range differential i/o ?0.5 to vdd +0.5 v control i/o ?0.5 to vdd + 0.5 v esd requirements: electrostatic discharge human body model 2000 v esd requirements: charged-device model (cdm) 500 v esd requirements: machine model 125 v storage ambient temperature -55 to 150 c table 4 absolute maximum ratings parameter notes min typical max unit power supply pin requirements vdd 1.2v dc analog supply voltage (specified at bump pins) 1.14 1.2 1.26 v temperature requirements ta ambient operating temperature - commercial 0 ? 70 c ambient operating temperature - industrial -40 ? 85 c tjunction junction operating temperature 0 ? 125 c table 5 p0604sb operating conditions
idt 89HP0604SB data sheet 12 february 8, 2011 power consumption table 6 below lists power consumption values under typical and maximum operating conditions. package thermal considerations the data in table 7 below contains information that is relevant to the thermal per formance of the 36-pin qfn package. note: it is important for the reliability of this device in any user environment that the juncti on temperature not exceed the t j(max) value specified in table 7 . consequently, the effective junction to ambient thermal resistance ( ja ) for the worst case scenario must be maintained below the value deter mined by the formula: ja = (t j(max) - t a(max) )/p given that the values of t j(max) , t a(max) , and p are known, the value of desired ja becomes a known entity to the system designer. how to achieve the desired ja is left up to the board or system designer, but in general, it can be achieved by adding the effects of jc (value provided in table 7 ), thermal resistance of the chosen adhesive ( cs ), that of the heat sink ( sa ), amount of airflow, and properties of the circuit board (number of laye rs and size of the board). parameter notes min typical max unit active mode i vdd current into vdd supply ? 330 500 ma p d full chip power 1 1. maximum power under all conditions. power is reduced by sele cting smaller de-emphasis settings (closer or equal to 0db). 400 600 mw p d-ch power per channel 1 100 150 mw standby mode full chip standby 30 40 mw table 6 power consumption symbol parameter value conditions units ja(effective) effective thermal resistance, junction-to-ambient 49.8 zero air flow o c/w 44.8 1 m/s air flow o c/w 42.2 2 m/s air flow o c/w jb thermal resistance, junction-to-board 39.3 na o c/w jc thermal resistance, junction-to-case 34.5 na o c/w table 7 thermal specifications for 36-qfn package
idt 89HP0604SB data sheet 13 february 8, 2011 dc specifications ac specifications latency specification receiver specifications parameter description min typ max unit v il digital input signal voltage low level 1 1. applies to all input pins. -0.3 ? 0.25*vdd-0.1 v v im digital input signal voltage mid level 2 2. applies to all 3-level input pins. 0.25*vdd+ 0.1 0.75*vdd-0.1 v v ih digital input signal voltage high level 1 0.75*vdd+ 0.1 vdd+ 0.3 v v hys hysteresis of schmitt trigger input 0.1 ? v i il input current 3 3. applies only to 2-level i nput pins with default values set to vdd in the pin description table ( table 12 ). ? 100 a i ih input current 4 4. applies only to 2-level i nput pins with default values set to vss in the pin de scription table ( table 12 ). ? 100 a i il1 input current 2 ? 180 a i ih1 input current 2 ? 180 a r weak_pd_2l internal weak pull-down resistor at 2-level input pads 4 11 ? k ohm r weak_pu_2l internal weak pull-up resistor at 2-level input pads 3 11 ? k ohm r weak_pd_3l internal weak pull-down resistor at all 3-level input pads 6.3 ? k ohm r weak_pu_3l internal weak pull-up resistor at all 3-level input pads 6.3 ? k ohm table 8 dc specification parameter description min typical max unit t pd input to output signal propagation device ? 300 ? ps t sigdet-attack signal detect valid signal attack time (turn-on time) ? ? 15 ns t sigdet-decay signal detect valid signal decay time (turn-off time) ? ? 15 ns t sigdet-att-decay-mis signal detect attack / decay time mismatch ? ? 5 ns table 9 p0604sb latency specification parameter description min typical max unit receiver input jitter specification t rx-dj receive input, data dependant jitter (inter-symbol- interference) ? ? >1 ui t rx-tj receive input, total jitter ? ? >1 ui t rx-eye receiver eye time opening (can recover from closed eye due to trace/cable jitter) 0 ? ? ui table 10 p0604sb receiver electrical specifications (part 1 of 2)
idt 89HP0604SB data sheet 14 february 8, 2011 transmitter specifications receiver input eye specification v diff-rx receiver differential peak-peak voltage 1 0 ? 2000 mv t skew-rx rx differential skew ? ? 30 ps v cm-ac-rx receiver ac common mode voltage ? ? 100 mvp-p v thresh oob signal detection threshold 50 110 160 mvppd receiver return loss rl dd11,rx rx differential mode return loss 0 mhz - 150 mhz 18 ? ? db 150 mhz - 300 mhz 18 ? ? 300 mhz - 600 mhz 14 ? ? 600 mhz - 1.2 ghz 10 ? ? 1.2 ghz - 2.4 ghz 8 ? ? 2.4 ghz - 3.0 ghz 3 ? ? 3.0 ghz - 5.0 ghz 1 ? ? rl rxslope slope of rx differential mode return loss (from 300mhz) ? -13 ? db/dec rl rx-freq-max rx differential mode return loss max frequency ? 6 ? ghz rl cc11,rx rx common mode return loss 0 mhz - 300 mhz 5 ? ? db 300 mhz - 600 mhz 5 ? ? 600 mhz - 1.2 ghz 2 ? ? 1.2 ghz - 2.4 ghz 1 ? ? 2.4 ghz - 3.0 ghz 1 ? ? 3.0 ghz - 5.0 ghz ? ? ? receiver dc impedance z diff-rx differential impedance , rx pair 85 ? 115 ohm z cm-rx common-mode receive impedance 20 ? 40 ohm 1. the minimum value of 0 mv represents the case when eye is completely closed. parameter description min typical max unit output eye and common voltage specification v tx-diff-pp differential transmitter swing [a:b]xtxsw=1 [a:b]xtxsw=open 800 700 950 800 1100 950 mv v tx-diff-pp-low low power differential p-p transmitter swing [a:b]xtxsw=0 400 500 650 mv table 11 p0604sb transmitter electrical requirements (part 1 of 2) parameter description min typical max unit table 10 p0604sb receiver electrical specifications (part 2 of 2)
idt 89HP0604SB data sheet 15 february 8, 2011 v tx-de-ratio tx de-emphasis level ratio -6.5 0 db v tx-de-ratio-3.5db tx de-emphasis level ratio [a:b]xtxsw=open -4.0 ? -3.0 db v tx-de-ratio-6db tx de-emphasis level [a:b]xtxsw=1 -6.5 ? -5.5 db t res-dj-6.25gbps-1 residual deterministic jitter at output pins (1 inch fr4 trace before receiver input pins, 6.25gbps) 1 ? ? <0.1 ui t res-dj-6.25gbps-2 residual deterministic jitter at output pins (40 inch fr4 trace before receiver input pins, 6.25gbps) 1 ? 0.18 0.25 ui t 20-80tx tx rise/fall time (20-80%) 33 ? 90 ps t skewtx tx differential skew ? ? 20 ps r/f bal tx rise/fall imbalance ? ? 20 % amp bal tx amplitude balance ? ? 10 % v cm,ac-tx-pp tx ac common mode voltage (peak to peak) ? ? 50 mvp-p v tx-cm-rms-ac rms ac common mode voltage variation ? ? 20 mv c tx ac coupling capacitor 12 ? 200 nf transmitter dc impedance z tx-diff-dc transmitter output differential dc impedance 85 100 115 ohm i tx-short transmitter short-circuit current limit ? ? 90 ma transmitter return loss rl dd11,tx dc tx differential mode return loss 14 ? ? db dc tx differential mode return loss (f baud/2 ) 6 ? ? rl txslope slope of tx differential mode return loss (from 300mhz) ? -13 ? db/dec rl cc11,tx tx common mode return loss (measured at 3.0 gbps) 0 mhz - 300 mhz 8 ? ? db 300 mhz - 600 mhz 5 ? ? 600 mhz - 1.2 ghz 2 ? ? 1.2 ghz - 2.4 ghz 1 ? ? 2.4 ghz - 3.0 ghz 1 ? ? 3.0 ghz - 5.0 ghz 1 ? ? lane skew l tx-skew lane-to-lane output skew ? 5 10 ps 1. refer to figure 12 . parameter description min typical max unit table 11 p0604sb transmitter electrical requirements (part 2 of 2)
idt 89HP0604SB data sheet 16 february 8, 2011 figure 12 residual jitter characterization test setup a ? fr4 trace b ? sma connector c ? measurement point note: fr4 test channel is bypass ed for 1-inch input trace case.
idt 89HP0604SB data sheet 17 february 8, 2011 pin description note: unused pins can be left floating. pin name pin # description input/ output/ power 2 or 3 level power vdd 5, 8, 11, 21, 24, 27 1.2v (typ) power supply for repeater high speed channels and internal logic. each vdd pin should be connected to the vdd plane through a low inductance path, with a via located as close as possible to the landing pad of vdd pins. it is rec - ommended to have a 0.01 f or 0.1 f, x7r, size-0402 bypass capacitor from each vdd pin to ground plane. power vss center pad vss reference. vss should be connected to the ground plane through a low inductance path, with a via located as close as possible to the landing pad. power data signals a0rxn a0rxp 4 3 channel a0 receive data ports input a0txn a0txp 28 29 channel a0 transmit data ports output b0rxn b0rxp 25 26 channel b0 receive data ports input b0txn b0txp 7 6 channel b0 transmit data ports output a1rxn a1rxp 10 9 channel a1 receive data ports input a1txn a1txp 22 23 channel a1 transmit data ports output b1rxn b1rxp 19 20 channel b1 receive data ports input b1txn b1txp 13 12 channel b1 transmit data ports output channel control and status a0rxeq (channel a0) b0rxeq (channel b0) a1rxeq (channel a1) b1rxeq (channel b1) 15 17 36 33 receiver equalization at f=3ghz (6gbps). programming of channel a0 via pins is shown below. to pro - gram other channels, use pins for those channels. a0rxeq setting vss 2db (3ghz) open 6db (3ghz) (default) vdd 14db (3ghz) input - 3 level table 12 pin description (part 1 of 2)
idt 89HP0604SB data sheet 18 february 8, 2011 a0txsw (channel a0) b0txsw (channel b0) a1txsw (channel a1) b1txsw (channel b1) 1 32 14 18 transmitter voltage swing (pk-pk). programming of channel a0 via pins is shown below. to pro - gram other channels, use pins for those channels. a0txsw swing de-emphasis vss 0.5vdiff-pkpk 0db open 0.8vdiff-pkpk (default) -3.5db vdd 0.95vdiff-pkpk -6.5db input - 3 level other control signals pdb 35 power-down enable. pdb setting vss powerdown ic. rx terminations are in hi-z, tx is disabled vdd normal operation (internal 11k ohm mini - mum pull-up applied) input - 2 level chsel 30 channel transfer mode. chsel setting vss multi-cast mode open direct-connect mode (default) vdd cross-connect mode input - 3 level rsvd 2,16,31,34 reserved. do not connect. pin name pin # description input/ output/ power 2 or 3 level table 12 pin description (part 2 of 2)
idt 89HP0604SB data sheet 19 february 8, 2011 package pinout ? 36-qfn signal pinout table 13 lists the pin numbers and signal names for the p0604sb device. pin diagram the following figure lists the pin numbers and the signal names for the 36-qfn package. figure 13 pin diagram ? top view function pin function pin function pin a0rxeq 15 a1txp 23 b1rxp 20 a0rxn 4 a1txsw 14 b1txn 13 a0rxp 3 b0rxeq 17 b1txp 12 a0txn 28 b0rxn 25 b1txsw 18 a0txp 29 b0rxp 26 chsel 30 a0txsw 1 b0txn 7 pdb 35 a1rxeq 36 b0txp 6 rsvd 2,16,31,34 a1rxn 10 b0txsw 32 vdd 5,8,11,21,24,27 a1rxp 9 b1rxeq 33 a1txn 22 b1rxn 19 table 13 alphabetical pin list
idt 89HP0604SB data sheet 20 february 8, 2011 qfn package dimension
idt 89HP0604SB data sheet 21 february 8, 2011 revision history november 2, 2010: initial publication of final datasheet. february 8, 2011: removed black pack a ging options from order page.
corporate headquarters 6024 silver creek valley road san jose, ca 95138 for sales: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com for tech support: email: siphelp@idt.com phone: 408-284-8208 ? 22 february 8, 2011 idt 89HP0604SB data sheet disclaimer integrated device technology, inc. (idt) and its subsid iaries reserve the right to modify the products and/or specif ications described herein at any time and at idt?s sole discretion. all information in this document, including descriptions of product features and performance, is subject to change without notice. performance specifications and the operating parameters of the described products are determined in the independent state and are not guaranteed to perform the same way when installed in customer products. the information contained herein is provided without representation or warranty of any kind, wh ether express or implied, including, but not limited to, the suit ability of idt?s products for any particular purpose, an impli ed warranty of merchantability, or non-infringe ment of the intellectual property rights of others. this document is presented only as a guide and does not convey any license under intellectual property rights of idt or any third parties. idt?s products are not intended for use in life support systems or similar devices where the failure or malfunction of an idt p roduct can be reasonably expected to significantly affect the health or safety of users. anyone using an idt product in such a manner does so at their own risk, absent an express, written agreement by idt. integrated device technology, idt and the idt logo are registered trademarks of idt. other trademarks and service marks used he rein, including protected names, logos and designs, are the property of idt or their respective third party owners. copyright 2011. all rights reserved. ordering information valid combinations 89HP0604SBzbnrg8 36-pin green qfn package, commercial temperature 89HP0604SBzbnrgi8 36-pin green qfn package, industrial temperature nn a a aa a operating voltage product device temp h product family 89 signal integrity product p repeater 1.2v +/- 5% detail legend a = alpha character n = numeric character nn chnls 04 4 channels nn speed 06 6gbps blank commercial temperature (0c to +70c ambient) i industrial temperature (-40 c to +85 c ambient) zb revision zb n tape & range reel 8 tape & reel aaa pkg sb sas/sata interface, ?b? version aa protocol nrg36 36-pin qfn, green nrg revision

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